Menta SAS is a privately held company based in Sophia-Antipolis, France. Vincent Markus, President and CEO, and Yoan Dupret, CTO of Menta, have repositioned the company as a semiconductor IP provider, offering a ground-breaking performance accelerator for edge computing in the form of embedded FPGA (eFPGA) IPs. Less than five companies in the world have industrialized the breakthrough technology for hardware reprogramming of any chip manufactured in the world, and Menta is a European and global leader in the field.
Interview with Yoan Dupret, CTO & Managing Director at Menta SAS.
Easy Engineering: What are the main areas of activity of the company?
Yoan Dupret: Our design-adaptive standard cells-based architecture and state-of-the-art tool set provides the highest degree of design customization, best-in-class testability, and fastest time-to-volume for SoC design targeting any production node at any foundry. Menta products are used worldwide by companies serving the defense, space, internet of things, industrial, 5G or automotive markets.
E.E: What’s the news about new products?
Y.D: We remain strongly focus on our eFPGA IP product which is available, since December 2021, as a soft IP – bringing unmatched added value for ASIC, SoCs and sensors companies selling chips in millions of units, but also to customers who need a close control of their whole supply chain – for e.g., in mil-aero. That means always improving our Origami Programmer software. Version 2022.2 is made available as we talk – bringing performances improvement but also a number of new features.
We are also working on three major innovations around and with our eFPGA IP to solve specific customers problems. It is however too early to disclose details – but would be pleased to talk together in a few months.
E.E: What are the ranges of products?
Y.D: Menta eFPGA Soft IPs offer SoC, ASIC and sensors designers the mean to evolve their chips over time and in the field for applications such as security/cryptography, artificial intelligence, motor control and telecommunication. At Menta we revolutionize the eFPGA market. We have a unique approach by providing an eFPGA IP which is completely design adaptive. Our customers can choose the numbers of resources in terms of LUTs but also DSPs and embedded memories. The DSPs and embedded memories are themselves completely configurable. It is so design adaptive that we now provide our eFPGA IP as a soft IP so that foundry, process node, standard cells, metal stack, power management and so on are all up to our customers choice. We adapt to our customers’ requirements and their needs in terms of resources, availability in the process nodes & process options they need, and a large number of options.
E.E: At what stage is the market where you are currently active?
Y.D: We know that the embedding programmable logic inside ASICs is an idea almost as old as the FPGA chips themselves. There have been many attempts in the past and many failures, from small to large companies, including Xilinx themselves. Menta actually proposed its eFPGA IP version 1 product in 2009 – 13 years ago. While we enjoyed modest local successes at this time, we could have anytime joined the cemetery of eFPGA IP companies. We have patiently built up the product that the customers wanted to have – which is now what we call eFPGA IP v5. Menta is now a company well into revenues, with customers in mass production shipping in several million of units, designs at 5 different foundries and more than 10 different process nodes. Our biggest achievement is to have strongly contributed to make the eFPGA IP market a reality. While the eFPGA market is still growing, we are now well past the early adopter’s stage. There are now numerous system companies doing their own chips with eFPGA IPs inside as the ROI is obvious at system level. This is pushing chip companies to consider eFPGA IPs for their mass production products – we are at the beginning of a massive wave of eFPGA IPs usage. We are now sure that such an IP will become ubiquitous.
E.E: What can you tell us about market trends?
Y.D: Obviously, edge computing and what we call extreme edge computing for battery power devices, is now a reality and the number of edge computing chips is about to explode. Edge computing comes with huge constraints on power consumption, form factor and cost. In addition, it needs compute acceleration. And because algorithms are evolving today much faster than the chip design cycle allows for, it requires adaptive compute acceleration. A clear market trend is therefore a requirement for low power reconfigurable parallel accelerators – for applications such as AI, cryptography or sensor fusions. Which is exactly what we provide with our eFPGA IP.
E.E: What are the most innovative products marketed?
Y.D: Menta is the proven eFPGA pioneer whose design-adaptive standard cells-based architecture and state-of-the-art tool set provides the highest degree of design customization, best-in-class testability and fastest time-to-volume for SoC design targeting any production node at any foundry.
Available as a Soft RTL or Hard GDSII IP, we are very different from our competitors on 3 major aspects.
First, the fact that we are design adaptive. We really adapt to our customers’ requirements. For example, we provided for Thales Alenia Space an eFPGA IP ready for production in X-FAB 180nm node, radiation hardened thanks to IMEC rad-hard standard cells in less than 4 months.
Second, we offer the fastest and easiest integration into our customers SoC designs. The soft IP is delivered in a matter of days. We offer the best yield, reliability and testability of the market. Our IP is compatible with any EDA flow and can be connected to any interfaces.
Last, we offer the best usability. As you know, an eFPGA IP, like a FPGA, is a useless piece of wood without a great RTL to bitstream software. Our Origami Programmer Software is self-contained – no need to buy a third-party tool or play with cumbersome free software. It can be provided standalone or as an API for integration within our customers SDK.
